Performance-driven simultaneous placement and routing for FPGA's.
Sudip NagRob A. RutenbarPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1998)
Keyphrases
- hardware implementation
- high speed
- data driven
- routing problem
- field programmable gate array
- signal processing
- hardware design
- real time image processing
- real time
- shortest path
- routing algorithm
- ant algorithm
- multicast routing
- single chip
- packet switching
- hardware architectures
- inter domain
- software implementation
- parallel architecture
- embedded systems
- low cost