A 1.8V p(seudo)SRAM using standard 140nm DRAM technology with self adapting clocked standby operation.
Thomas JanikEric LiauHarald LorenzManfred MenkeEckehard PlaettnerJoerg SchwedenHelmut SeitzEsther Vega-OrdonezPublished in: ISCAS (2006)
Keyphrases
- neural network
- cmos technology
- low power
- power consumption
- dynamic random access memory
- embedded dram
- power dissipation
- low voltage
- nm technology
- random access memory
- silicon on insulator
- personal computer
- low cost
- main memory
- rapid development
- key technologies
- cost effective
- memory subsystem
- power management
- high density
- high speed
- data processing
- information systems
- metal oxide semiconductor
- data transmission
- real time