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Voltage Surges by Backside ESD Impacts on IC Chip in Flip Chip Packaging.
Takuya Wadatsumi
Kohei Kawai
Rikuu Hasegawa
Takuji Miki
Makoto Nagata
Kikuo Muramatsu
Hiromu Hasegawa
Takuya Sawada
Takahito Fukushima
Hisashi Kondo
Published in:
IRPS (2022)
Keyphrases
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high speed
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analog vlsi
vlsi implementation
programmable logic
low power
circuit design
single chip
physical design
vlsi design
data sets
neural network
printed circuit boards
evolvable hardware
modular design