Reconfigurable On-Chip SIMD Processor Architectures for Intelligent CMOS Camera Chips.
Dietmar FeyLutz HoppeAndreas LoosPublished in: PARELEC (2004)
Keyphrases
- functional units
- high speed
- processing elements
- chip design
- image sensor
- smart camera
- single instruction multiple data
- single chip
- focal plane
- image processing algorithms
- parallel processing
- parallel architectures
- cmos image sensor
- low cost
- real time
- massively parallel
- highly parallel
- low power
- analog vlsi
- hardware implementation
- video camera
- floating point unit
- parallel computers
- circuit design
- surveillance system
- hardware architecture
- design methodology
- parallel processors
- dynamic range
- digital signal processors
- physical design
- rolling shutter
- parallel algorithm
- infrared
- associative memory
- embedded systems
- digital camera
- parallel architecture
- camera network
- field programmable gate array
- random access
- metal oxide semiconductor
- high density
- random access memory
- computer architecture
- integrated circuit