A Chip-Stacked Memory for On-Chip SRAM-Rich SoCs and Processors.
Hideaki SaitoMasayuki NakajimaTakumi OkamotoYusuke YamadaAkira OhuchiNoriyuki IguchiToshitsugu SakamotoKoichi YamaguchiMasayuki MizunoPublished in: IEEE J. Solid State Circuits (2010)
Keyphrases
- random access memory
- memory subsystem
- multithreading
- memory access
- processor core
- low cost
- dynamic random access memory
- high speed
- memory bandwidth
- level parallelism
- analog vlsi
- vlsi implementation
- programmable logic
- power consumption
- ibm zenterprise
- high density
- low voltage
- embedded dram
- signal processor
- parallel processing
- power dissipation
- physical design
- single chip
- design considerations
- circuit design
- processing units
- computational power
- low power
- chip design
- main memory
- image sensor