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Test-Volume Reduction in Systems-on-a-Chip Using Heterogeneous and Multilevel Compression Techniques.

Loganathan LingappanSrivaths RaviAnand RaghunathanNiraj K. JhaSrimat T. Chakradhar
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2006)
Keyphrases
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