A new circuit optimization technique for high performance CMOS circuits.
H. Y. ChenSung-Mo KangPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1991)
Keyphrases
- circuit design
- analog vlsi
- delay insensitive
- cmos technology
- power dissipation
- high speed
- vlsi circuits
- chip design
- low power
- digital circuits
- power consumption
- low voltage
- asynchronous circuits
- analog circuits
- high efficiency
- real time
- shift register
- logic circuits
- high reliability
- low power consumption
- scientific computing
- logic synthesis
- parallel processing
- low cost
- neural network