An 830mW, 586kbps 1024-bit RSA chip design.

Chingwei Yeh En-Feng Hsu Kai-Wen Cheng Jinn-Shyan Wang Nai-Jen Chang

Published in: DATE Designers' Forum (2006)

Keyphrases

chip design
power consumption
power dissipation
design methodology
physical design
bit rate
public key
low power
signature scheme
databases
computer vision
image analysis
data warehouse
model checking