A 65nm CMOS SoC with embedded HSDPA/EDGE transceiver, digital baseband and multimedia processor.
Alberto CicaliniSankaran AniruddhanRahul ApteFrederic BossuOjas ChoksiDan FilipovicKunal GodboleTsai-Pi HungChristos KomninakisDavid MaldonadoChiewcharn NarathongBabak NejatiDeirdre O'SheaXiaohong QuanRaj RangarajanJanakiram SankaranarayananAndrew SeeRavi SridharaBo SunWenjun SuKlaas van ZalingeGang ZhangKamal SahotaPublished in: ISSCC (2011)
Keyphrases
- low power
- multimedia
- single chip
- high speed
- metal oxide semiconductor
- cmos image sensor
- embedded processors
- embedded systems
- low cost
- cmos technology
- mixed signal
- dynamic random access memory
- ultra low power
- digital media
- digital multimedia
- circuit design
- digital video
- nm technology
- phase locked loop
- silicon on insulator
- power consumption
- embedded dram
- hardware and software
- parallel processing
- multimedia data
- image sensor
- edge detection
- integrated circuit
- metadata
- real time
- chip design
- edge information
- weighted graph
- video data
- power supply
- random access memory
- multimedia content
- solid state
- low voltage
- delay insensitive
- digital content
- cultural heritage