Polynomial-Time Formal Verification of Adder Circuits for Multiple-Valued Logic.
Philipp NiemannRolf DrechslerPublished in: ISMVL (2022)
Keyphrases
- formal verification
- multiple valued logic
- multiple valued
- logic circuits
- fuzzy control
- model checking
- power dissipation
- model checker
- multi valued
- approximation algorithms
- automated verification
- symbolic model checking
- power consumption
- data flow
- digital circuits
- fuzzy logic
- control system
- expert systems
- artificial intelligence
- decision making
- file organization
- input output
- circuit design
- continuous attributes
- neural network
- boolean functions