P-NoC: Performance Evaluation and Design Space Exploration of NoCs for Chip Multiprocessor Architecture Using FPGA.
Khyamling ParanePrabhu B. M. PrasadBasavaraj TalawarPublished in: Wirel. Pers. Commun. (2020)
Keyphrases
- network on chip
- design space exploration
- multiprocessor architecture
- production system
- routing algorithm
- design space
- network simulator
- multi processor
- computer architecture
- design process
- single chip
- data transfer
- hardware software partitioning
- power dissipation
- high speed
- high level synthesis
- hardware implementation
- case study
- field programmable gate array
- computer systems
- programmable logic
- low cost
- information systems
- low power consumption
- machine learning
- fault tolerant
- multistage