Energy-performance design exploration of a low-power microprogrammed deep-learning accelerator.
Giulia SantoroMario R. CasuValentino PelusoAndrea CalimeraMassimo AliotoPublished in: DATE (2018)
Keyphrases
- low power
- deep learning
- single chip
- ultra low power
- low cost
- power consumption
- low power consumption
- high speed
- vlsi architecture
- logic circuits
- digital signal processing
- gate array
- mixed signal
- power dissipation
- cmos technology
- energy dissipation
- power reduction
- signal processing
- data mining
- feature selection
- feature extraction
- pairwise
- design process
- unsupervised learning
- dimensionality reduction