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A 220-MHz pipelined 16-Mb BiCMOS SRAM with PLL proportional self-timing generator.
Kazuyuki Nakamura
Shigeru Kuhara
Tohru Kimura
Masahide Takada
Hisamitsu Suzuki
Hiroshi Yoshida
Tohru Yamazaki
Published in:
IEEE J. Solid State Circuits (1994)
Keyphrases
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power consumption
cmos technology
data flow
high speed
mixed signal
nm technology
data transmission
low power
times faster
pseudorandom
signal processing
inversely proportional
inter frame
high frequency
asynchronous circuits
database systems
data generator
database