Concurrent Error Detection in Systolic Array AB^2 Multiplier Using Linear Codes.
Chiou-Yng LeePublished in: CASoN (2010)
Keyphrases
- error detection
- error correction
- systolic array
- error correcting
- error recovery
- error control
- fault tolerance
- reconfigurable architecture
- data cleansing
- fault isolation
- error resilient
- parallel architecture
- data flow
- floating point
- multi agent systems
- load balancing
- signal processing
- database systems
- image processing