A 32.2 TOPS/W SRAM Compute-in-Memory Macro Employing a Linear 8-bit C-2C Ladder for Charge Domain Computation in 22nm for Edge Inference.
Hechen WangRenzhi LiuRichard DorranceDeepak DasalukunteXiaosen LiuDan LakeBrent R. CarltonMay WuPublished in: VLSI Technology and Circuits (2022)
Keyphrases
- random access memory
- embedded dram
- efficient computation
- dynamic random access memory
- memory usage
- efficiently computing
- domain specific
- power consumption
- shift register
- edge detection
- domain independent
- low power
- probabilistic inference
- edge information
- main memory
- neural network
- memory space
- design considerations
- memory management
- gauss seidel