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A 80-gbit/s D-type flip-flop circuit using InP HEMT technology.
Toshihide Suzuki
Tsuyoshi Takahashi
Tatsuya Hirose
Masahiko Takikawa
Published in:
IEEE J. Solid State Circuits (2004)
Keyphrases
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flip flops
cmos technology
power dissipation
case study
high speed
low power
pattern recognition
computer systems
multiple input
gate array
hidden markov models
signal to noise ratio