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On-chip accumulated jitter measurement for phase-locked loops.
Chih-Feng Li
Shao-Sheng Yang
Tsin-Yuan Chang
Published in:
ASP-DAC (2005)
Keyphrases
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phase locked
low cost
high speed
single chip
data acquisition
packet loss
analog vlsi
real time
circuit design
measurement error
vlsi implementation
image processing
database systems
high density