A VLSI architecture for hierarchical scene matching.

R. Venkatesan Raghu Sastry N. Ranganathan

Published in: ICPR (4) (1992)

Keyphrases

vlsi architecture
scene matching
low power
vlsi implementation
low complexity
real time
image matching
coarse to fine
low cost
image processing
high speed
neural network
image retrieval
image registration
power consumption