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Decomposition based approach for synthesis of multi-level threshold logic circuits.

Tejaswi GowdaSarma B. K. Vrudhula
Published in: ASP-DAC (2008)
Keyphrases
  • functional decomposition
  • logic circuits
  • logic synthesis
  • low power
  • boolean functions
  • gate array
  • real time
  • low cost
  • digital circuits
  • pattern recognition
  • power consumption