Coherence Maintenances to realize an efficient parallel processing for a Cache Memory with Synchronization on a Chip-Multiprocessor.
Akira YamawakiMasahiko IwanePublished in: ISPAN (2005)
Keyphrases
- parallel processing
- multithreading
- computational power
- level parallelism
- memory bandwidth
- parallel programming
- memory subsystem
- processing speed
- distributed processing
- memory access
- multiple queries
- processing units
- ibm sp
- parallel architectures
- parallel computing
- cmos technology
- distributed memory
- pc cluster
- parallel computers
- cache misses
- parallel execution
- low cost
- main memory
- parallel computation
- cmos image sensor
- shared memory multiprocessors
- speculative execution