A low power and high speed Viterbi decoder chip for WLAN applications.
Chien-Ching LinChia-Cho WuChen-Yi LeePublished in: ESSCIRC (2003)
Keyphrases
- low power
- high speed
- noisy channel
- single chip
- low power consumption
- hidden markov models
- cmos technology
- signal processor
- power dissipation
- mixed signal
- image sensor
- vlsi architecture
- wireless networks
- decoding algorithm
- low cost
- low complexity
- error concealment
- digital signal processing
- power reduction
- quality of service
- gate array
- video codec
- error correction
- frame rate
- real time
- ultra low power
- nm technology
- vlsi circuits
- motion estimation
- logic circuits
- error resilient
- distributed video coding