Layout engineering to suppress hysteresis of negative capacitance FinFET.

Eunah Ko Jaesung Jo Changhwan Shin Bich-Yen Nguyen

Published in: ICICDT (2017)

Keyphrases

high speed
positive and negative
software engineering
engineering design
unit length
highly nonlinear
low power
decision trees
artificial intelligence
computer science
design process
low cost
phase transition
engineering problems
electrical engineering
layout design
neural network