FADEC: FPGA-based Acceleration of Video Depth Estimation by HW/SW Co-design.
Nobuho HashimotoShinya Takamaeda-YamazakiPublished in: FPT (2022)
Keyphrases
- depth estimation
- hw sw
- hardware software partitioning
- dynamic scenes
- embedded systems
- stereo vision
- hardware software
- depth map
- field programmable gate array
- video sequences
- stereo matching
- depth information
- design methodology
- real scenes
- video data
- video frames
- space time
- real time
- hardware design
- scene understanding
- stereo pair
- super resolution
- specular reflection
- feature matching
- multi view
- pairwise
- hardware and software
- disparity map
- moving objects
- motion segmentation
- video surveillance
- spatio temporal
- low cost
- high quality