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PPAC of sheet-based CFET configurations for 4 track design with 16nm metal pitch.

P. SchuddinckF. M. BuflerYang XiangA. FarokhnejadGioele MirabelliA. VandoorenBilal ChehabA. GuptaC. Roda NeveGeert HellingsJulien Ryckaert
Published in: VLSI Technology and Circuits (2022)
Keyphrases
  • computer aided
  • optimal design
  • data sets
  • user interface
  • building blocks
  • real time
  • real world
  • information retrieval
  • case study
  • high speed
  • design principles
  • design methodology