Investigation of electrically gate-all-around hexagonal nanowire FET (HexFET) architecture for 5 nm node logic and SRAM applications.
Jeffrey A. SmithKai NiRam Krishna GhoshJeff XuMustafa BadarogluP. R. Chidi ChidambaramSuman DattaPublished in: ESSDERC (2017)
Keyphrases
- cmos technology
- nm technology
- power consumption
- embedded dram
- low power
- leakage current
- random access memory
- power dissipation
- metal oxide semiconductor
- management system
- chip design
- low voltage
- flip flops
- design considerations
- classical logic
- high speed
- data transmission
- modal logic
- logic programming
- multiscale
- real time
- multi valued
- hardware implementation