A Novel Systolic Parallel Hardware Architecture for the FPGA Acceleration of Feedforward Neural Networks.
Leandro D. MedusTaras IakymchukJosé Vicente Francés-VílloraManuel Bataller-MompeánAlfredo Rosado MuñozPublished in: IEEE Access (2019)
Keyphrases
- parallel hardware
- feedforward neural networks
- systolic array
- back propagation
- neural network
- recurrent neural networks
- real time
- hardware implementation
- hidden layer
- error function
- parallel architecture
- training algorithm
- network architecture
- hardware architecture
- multilayer perceptron
- hardware design
- multi layer perceptron
- fuzzy clustering
- extreme learning machine
- artificial neural networks