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3D Partitioning with Pipeline Optimization for Low-Latency Memory Access in Many-Core SoCs.
Sudipta Das
Samuel Riedel
Marco Bertuletti
Luca Benini
Moritz Brunion
Julien Ryckaert
James Myers
Dwaipayan Biswas
Dragomir Milojevic
Published in:
ISCAS (2024)
Keyphrases
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low latency
memory access
high throughput
highly efficient
high speed
real time
stream processing
virtual machine
main memory
data analysis
data processing
data access
access patterns
external memory