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A VLSI design of clock gated technique based ADC lock-in amplifier.
M. Saritha
M. Lavanya
G. Ajitha
Mulinti Narendra Reddy
P. Annapurna
M. Sreevani
S. Swathi
S. Sushma
Vallabhuni Vijay
Published in:
Int. J. Syst. Assur. Eng. Manag. (2022)
Keyphrases
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vlsi design
power consumption
low power
high speed
wide dynamic range
dynamic range
high power
high sensitivity
concurrency control
design methodology
genetic algorithm
database systems
analog to digital converter