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M. Sreevani
Publication Activity (10 Years)
Years Active: 2021-2022
Publications (10 Years): 2
Top Topics
Dynamic Range
Low Power
Analog To Digital Converter
Vlsi Design
Top Venues
Int. J. Syst. Assur. Eng. Manag.
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Publications
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M. Saritha
,
M. Lavanya
,
G. Ajitha
,
Mulinti Narendra Reddy
,
P. Annapurna
,
M. Sreevani
,
S. Swathi
,
S. Sushma
,
Vallabhuni Vijay
A VLSI design of clock gated technique based ADC lock-in amplifier.
Int. J. Syst. Assur. Eng. Manag.
13 (5) (2022)
Vallabhuni Vijay
,
C. V. Sai Kumar Reddy
,
Chandra Shaker Pittala
,
Rajeev Ratna Vallabhuni
,
M. Saritha
,
M. Lavanya
,
S. China Venkateswarlu
,
M. Sreevani
ECG performance validation using operational transconductance amplifier with bias current.
Int. J. Syst. Assur. Eng. Manag.
12 (6) (2021)