System-Level Design and Integration of a Prototype AR/VR Hardware Featuring a Custom Low-Power DNN Accelerator Chip in 7nm Technology for Codec Avatars.
H. Ekin SumbulTony F. WuYuecheng LiSyed Shakib SarwarWilliam KovenEli Murphy-TrotzkyXingxing CaiElnaz AnsariDaniel H. MorrisHuichu LiuDoyun KimEdith BeignéPublished in: CICC (2022)
Keyphrases
- low power
- nm technology
- single chip
- low cost
- power consumption
- low power consumption
- power dissipation
- high speed
- vlsi architecture
- mixed signal
- digital signal processing
- cmos technology
- chip design
- image sensor
- virtual environment
- logic circuits
- hardware and software
- augmented reality
- virtual reality
- signal processor
- vlsi circuits
- cmos image sensor
- gate array
- virtual world
- field programmable gate array
- power reduction
- embedded systems
- signal processing
- circuit design
- motion estimation
- massively parallel
- hardware implementation
- ultra low power