A 1, 632 Gate-Count Zero-Overhead Dynamic Optically Reconfigurable Gate Array VLSI.

Minoru Watanabe Fuminori Kobayashi

Published in: ARC (2006)

Keyphrases

gate array
low power
logic circuits
low cost
high speed
image processing
general purpose
distributed systems
signal processing
hardware implementation
dynamic environments
vlsi design
low overhead
efficient implementation
fault tolerant
mobile robot
pattern recognition