Implementation of an asynchronous cellular logic network as a co-processor for a general-purpose massively parallel array.
Alexey LopichPiotr DudekPublished in: ECCTD (2007)
Keyphrases
- massively parallel
- general purpose
- graphics processing units
- parallel computers
- processing elements
- parallel architectures
- parallel computing
- high performance computing
- asynchronous circuits
- fine grained
- instruction set
- computer architecture
- high speed
- random access memory
- parallel processing
- data transfer
- parallel machines
- wireless sensor networks
- floating point
- efficient implementation
- probabilistic model