Pin-Efficient 12-Bit 8-Wire 8-Level Permutation Coding for High-Speed Parallel Wireline Tranceivers.

Ailing Piao Aili Wang C.-J. Richard Shi

Published in: ISCAS (2018)

Keyphrases

high speed
computationally expensive
coding scheme
high speed networks
cost effective
highly efficient
computational complexity
parallel implementation
parallel computation
bit vector
satisfiability testing