On-chip jitter and oscilloscope circuits using an asynchronous sample clock.
Jeremy D. SchaubFadi H. GebaraTuyet NguyenIvan VoJarom PeñaDhruva J. AcharyyaPublished in: ESSCIRC (2008)
Keyphrases
- high speed
- analog vlsi
- shift register
- delay insensitive
- built in self test
- low power
- chip design
- circuit design
- power consumption
- power dissipation
- cmos technology
- asynchronous circuits
- high level synthesis
- high density
- random access memory
- real time
- sample size
- mixed signal
- focal plane
- neural network
- integrated circuit
- packet loss
- low cost