A 69 dB SNDR, 25 MHz BW, 800 MS/s Continuous-Time Bandpass ΔΣ Modulator Using a Duty-Cycle-Controlled DAC for Low Power and Reconfigurability.
Hyungil ChaeMichael P. FlynnPublished in: IEEE J. Solid State Circuits (2016)
Keyphrases
- low power
- duty cycle
- bandpass
- high speed
- power consumption
- clock frequency
- cmos technology
- frequency domain
- real time
- low cost
- frequency band
- nm technology
- low pass
- high frequency
- textured images
- low frequency
- subband
- digital signal processing
- color images
- filter bank
- image sensor
- wavelet transform
- pattern recognition
- computer vision