Memory based computation using embedded cache for processor yield and reliability improvement.
Somnath PaulSwarup BhuniaPublished in: ICCD (2007)
Keyphrases
- embedded processors
- single chip
- dynamic random access memory
- parallel implementation
- computation intensive
- high speed
- shared memory multiprocessors
- processor core
- memory subsystem
- multithreading
- memory hierarchy
- shared memory multiprocessor
- embedded systems
- parallel computation
- memory access
- cache management
- random access
- low power
- query processing