NVM Way Allocation Scheme to Reduce NVM Writes for Hybrid Cache Architecture in Chip-Multiprocessors.
Ju Hee ChoiGi-Ho ParkPublished in: IEEE Trans. Parallel Distributed Syst. (2017)
Keyphrases
- multithreading
- allocation scheme
- parallel computing
- memory access
- highly efficient
- random access
- computational power
- memory subsystem
- analog vlsi
- management system
- shared memory multiprocessors
- distributed memory
- low cost
- shared memory
- memory hierarchy
- processor core
- parallel architecture
- high speed
- host computer
- high density
- computer architecture
- prefetching
- data access
- main memory
- power consumption
- data structure