Design of High Performance 8 bit Multiplier using Vedic Multiplication Algorithm with McCMOS Technique.
D. KayalPosiba MostafaAnup DandapatChandan Kumar SarkarPublished in: J. Signal Process. Syst. (2014)
Keyphrases
- recognition algorithm
- dynamic programming
- preprocessing
- computational cost
- improved algorithm
- learning algorithm
- detection algorithm
- computational complexity
- search space
- expectation maximization
- k means
- experimental evaluation
- times faster
- low cost
- cost function
- significant improvement
- bit vectors
- case study
- hardware implementation
- high efficiency
- low power
- integer arithmetic
- convergence rate
- matching algorithm
- segmentation algorithm
- high accuracy
- worst case
- user interface
- search algorithm
- optimal solution