Partitioning Sequential Circuits on Dynamically Reconfigurable FPGAs.

Douglas Chang Malgorzata Marek-Sadowska

Published in: IEEE Trans. Computers (1999)

Keyphrases

real time
high speed
delay insensitive
asynchronous circuits
sequential data
field programmable gate array
parallel architectures
analog circuits
vlsi circuits
information retrieval
information systems
embedded systems
digital circuits
sequential search
analog vlsi