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Static energy reduction techniques for microprocessor caches.
Heather Hanson
M. S. Hrishikesh
Vikas Agarwal
Stephen W. Keckler
Doug Burger
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2003)
Keyphrases
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high speed
energy consumption
neural network
energy saving
functional verification
energy efficiency
floating point
caching scheme
database
response time
energy efficient
total energy
network load
energy distribution
special purpose hardware