Selective register-file cache: an energy saving technique for embedded processor architecture.
Sumanth GudaparthiRahul ShresthaPublished in: Des. Autom. Embed. Syst. (2022)
Keyphrases
- energy saving
- embedded processors
- dynamic random access memory
- power management
- energy consumption
- memory hierarchy
- multithreading
- memory subsystem
- memory access
- power consumption
- single chip
- instruction set
- ibm power processor
- wireless sensor networks
- power saving
- memory management
- energy conservation
- read write
- real time
- management system
- save energy
- global warming
- energy efficient
- parallel architecture
- energy efficiency
- parallel processing
- embedded systems
- high speed
- database
- industry standard
- electricity consumption
- low cost
- hardware and software
- processor core
- sensor networks
- level parallelism
- air conditioning
- shared memory multiprocessor
- file system
- shared memory multiprocessors