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High-performance and high-yield 5 nm underlapped FinFET SRAM design using P-type access transistors.

Roohollah YarmandBehzad EbrahimiHassan Afzali-KushaAli Afzali-KushaMassoud Pedram
Published in: ISQED (2015)
Keyphrases
  • cmos technology
  • low power
  • power consumption
  • low power consumption
  • circuit design
  • design process
  • low cost
  • website
  • case study
  • design principles
  • embedded systems
  • high reliability
  • power dissipation
  • nm technology