processing architecture - High reliability and low power computing for novel nano tactile sensor array.
Kiyotaka KomokuKazutami ArimotoTomoyuki YokogawaHitoshi YamauchiYoichiro SatoHidekuni TakaoPublished in: ISOCC (2016)
Keyphrases
- low power
- high reliability
- sensor array
- low cost
- vlsi architecture
- real time
- power consumption
- cmos technology
- high speed
- mixed signal
- single chip
- high precision
- line fitting
- low power consumption
- vlsi circuits
- nm technology
- image sensor
- signal processor
- digital signal processing
- embedded systems
- power reduction
- hough transform
- hardware implementation
- power dissipation
- associative memory