Low DRAM Memory Access and Flexible Dataflow Convolutional Neural Network Accelerator based on RISC-V Custom Instruction.
Yi-Fan ChenYu-Jen ChangChing-Te ChiuMing-Long HuangGeng-Ming LiangChao-Lin LeeJenq-Kuen LeePing-Yu HsiehWei-Chih LaiPublished in: ISCAS (2024)
Keyphrases
- instruction set
- memory access
- main memory
- convolutional neural network
- application specific
- data access
- memory hierarchy
- database management systems
- cache misses
- data structure
- external memory
- face detection
- shared memory
- index structure
- computation intensive
- processing units
- parallel computing
- floating point
- memory management
- general purpose
- computer architecture
- access patterns
- object detection
- data storage
- embedded systems
- level parallelism
- parallel implementation
- database
- website
- databases