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Architecture of a multi-context FPGA using a hybrid multiple-valued/binary context switching signal.
Yoshihiro Nakatani
Masanori Hariyama
Michitaka Kameyama
Published in:
IPDPS (2006)
Keyphrases
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multiple valued
multi valued
multiple valued logic
neural network
boolean functions
hardware implementation
file organization
continuous attributes
optical flow
image compression