Extensions to Programmable DSP architectures for Reduced Power Dissipation.
Mahesh MehendaleSunil D. SherlekarG. VenkateshPublished in: VLSI Design (1998)
Keyphrases
- digital signal processing
- power dissipation
- digital signal processors
- low power
- signal processing
- power consumption
- field programmable gate array
- data flow
- low cost
- image processing
- power reduction
- logic circuits
- computer vision and image processing
- chip design
- cmos technology
- network on chip
- digital signal processor
- pattern recognition
- finite state machines
- relational databases