Design and Implementation of a High Speed MAP Decoder Architecture for Turbo Decoding.
Rahul ShresthaRoy P. PailyPublished in: VLSI Design (2013)
Keyphrases
- high speed
- fpga implementation
- software architecture
- architectural design
- design considerations
- hardware architecture
- design methodology
- hardware design
- vlsi architecture
- platform independent
- decoding process
- hardware architectures
- low power
- design principles
- real time
- layered architecture
- video decoder
- efficient implementation
- low complexity
- soft decision
- highly modular
- analog to digital converter
- core components
- multimedia communication
- motion estimation