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Physical synthesis for FPGA interconnect power reduction by dual-Vdd budgeting and retiming.
Yu Hu
Yan Lin
Lei He
Tim Tuan
Published in:
ACM Trans. Design Autom. Electr. Syst. (2008)
Keyphrases
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power reduction
power dissipation
power consumption
low power
high speed
power saving
digital signal processing
low cost
pattern recognition
design methodology