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Design for Delay Measurement Aimed at Detecting Small Delay Defects on Global Routing Resources in FPGA.
Kazuteru Namba
Nobuhide Takashina
Hideo Ito
Published in:
IEICE Trans. Inf. Syst. (2013)
Keyphrases
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qos routing
hardware design
network reliability
real time
case study
user interface
routing algorithm
embedded systems
hardware implementation
ip networks
power dissipation
end to end delay
multipath routing
gate array