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Layer-Aware 3D-IC Partitioning for Area-Overhead Reduction Considering the Power of Interconnections and Pads.

Yung-Hao LaiYang-Lang ChangJyh-Perng FangLena ChangHirokazu Kobayashi
Published in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2016)
Keyphrases
  • power consumption
  • multi layer
  • data reduction
  • integrated circuit
  • high density
  • application layer
  • multiple layers
  • real time
  • real world
  • machine learning
  • image processing
  • reduction method